1. Field of the Invention
Embodiments of the present invention generally relate to methods of forming films on substrates, such as semiconductor substrates. More particularly, embodiments of the present invention relate to methods for forming boron-containing films on substrates.
2. Description of the Related Art
Integrated circuit geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore's Law), which means that the number of devices on a chip doubles every two years. Today's fabrication facilities are routinely producing devices having 90 nm feature sizes, and tomorrow's facilities soon will be producing devices having even smaller feature sizes.
The continued reduction in device geometries and the increasingly dense spacing of devices on semiconductor substrates have presented challenges in the area of improving device performance. For example, while the performance of a metal-oxide-semiconductor field effect transistor (MOSFET) device can be improved by several methods, such as reducing the gate dielectric thickness of the device, the very thin dielectric layers required by small devices may allow dopants from the gate electrode to penetrate through the gate dielectric into the underlying silicon substrate. A very thin gate dielectric may also increase gate leakage that increases the amount of power consumed by the gate and eventually damages the transistor.
Straining the atomic lattice of materials in devices is a recently developed, alternative method of improving device performance. Straining the atomic lattice improves device performance by increasing carrier mobility in a semiconductor material. The atomic lattice of one layer of a device can be strained by depositing a stressed film over the layer. For example, stressed silicon nitride (SiN) layers used as etch stop layers over a gate electrode can be deposited to induce strain in the channel region of the transistor. The stressed, strain-inducing silicon nitride layers can have compressive stress or tensile stress.
While plasma-enhanced chemical vapor deposited (PECVD) silicon nitride layers having relatively high stress levels have been developed, there remains a need for a method for forming films that have higher tensile stress levels than silicon nitride, which typically has a tensile stress of no more than 1.7 GPa.